Graphene is the firstly discovered of a new family ofmaterials, such as h-BN and WSe2, that have a two dimensionallattice structure, which amongst other things, are highly thermally conductiveand suitable for passively dissipating heat. Through a combination ofexperimental work and finite element simulation, the results shown in this workpredict that cheaply produced graphene-based films (GBFs) can passively coolpower chips effectively when carefully designed and transferred onto the chipin a way that ensures good bonding and thermal coupling. The better the thermalcoupling, the lower the thermal resistance and the lower the hot spottemperature. This improvement in thermal coupling is achieved experimentallythrough the silane functionalization of a thin graphene oxide (GO) interlayer[1]. To simulate the effect of silane functionalization, the thermalconductance between the GBF and test chip is varied between 105 and109 W/m2K in a finite element (FE) model, with theresults shown in fig 1 (a).

Experimentally, a 10 x 10 mm2graphene-based film (GBF) with a thickness of 20 mm was firstly placed onto thermal release tape andthen spin-coated with silane-functionalized GO. This bundle was thentransferred onto the SiO2 insulating surface, above the Ti/Pt/Auheating element. The GO-silane functionalization was done to promote adhesionthe SiO2 insulation and GBF, which in turn lowers the thermalresistance at that interface. A thermal flux was applied to the chip and it wasallowed to reach thermal equilibrium. For this experimental set up with silanefunctionalization, the hot spot temperature was found to be 131°C at 1500 W/cm2[1] as measured through the resistance of the Pt micro-heater. The GBF wasdetermined as having in-plane and through-plane thermal conductivities of 1646W/mK (Hot Disk) [1] and 0.001 W/mK respectively. The thermal conductivity of Siis estimated at 50 W/mK, based on the validation simulations, and a variablethermal flux was applied to the Pt heater.

As figure 1 shows, the simulation results closelymatch that from experiment [1], where both show a linear relationship betweentemperature and power density. The numerical values from the model are veryclose to the experiment, suggesting that the material properties arereasonable. At 1500 W/cm2, using a silane functionalized GO layerresults in a 7°C decrease in temperature when compared to thenon-functionalized case. In the FE simulation, an 11.85°C decrease is measuredwhen increasing the thermal conductance of the functionalization layer from 105to 109 W/m2K at 1500 W/cm2. A smaller decreaseof 5.85°C was measured from 106 to 109 Wm2K at1500 W/cm2. The good accuracy of this simulation suggests that itcan be used as a design tool for predicting the cooling performance ofthermally conductive films. These initial findings suggest that when thesimulation is used in conjunction with experimental measurements and lowerscale atomistic simulations, such as molecular dynamics, it will produceaccurate predictions.

Graphene is the firstly discovered of a new family ofmaterials, such as h-BN and WSe2, that have a two dimensionallattice structure, which amongst other things, are highly thermally conductiveand suitable for passively dissipating heat. Through a combination ofexperimental work and finite element simulation, the results shown in this workpredict that cheaply produced graphene-based films (GBFs) can passively coolpower chips effectively when carefully designed and transferred onto the chipin a way that ensures good bonding and thermal coupling. The better the thermalcoupling, the lower the thermal resistance and the lower the hot spottemperature. This improvement in thermal coupling is achieved experimentallythrough the silane functionalization of a thin graphene oxide (GO) interlayer[1]. To simulate the effect of silane functionalization, the thermalconductance between the GBF and test chip is varied between 105 and109 W/m2K in a finite element (FE) model, with theresults shown in fig 1 (a).

Experimentally, a 10 x 10 mm2graphene-based film (GBF) with a thickness of 20 mm was firstly placed onto thermal release tape andthen spin-coated with silane-functionalized GO. This bundle was thentransferred onto the SiO2 insulating surface, above the Ti/Pt/Auheating element. The GO-silane functionalization was done to promote adhesionthe SiO2 insulation and GBF, which in turn lowers the thermalresistance at that interface. A thermal flux was applied to the chip and it wasallowed to reach thermal equilibrium. For this experimental set up with silanefunctionalization, the hot spot temperature was found to be 131°C at 1500 W/cm2[1] as measured through the resistance of the Pt micro-heater. The GBF wasdetermined as having in-plane and through-plane thermal conductivities of 1646W/mK (Hot Disk) [1] and 0.001 W/mK respectively. The thermal conductivity of Siis estimated at 50 W/mK, based on the validation simulations, and a variablethermal flux was applied to the Pt heater.

As figure 1 shows, the simulation results closelymatch that from experiment [1], where both show a linear relationship betweentemperature and power density. The numerical values from the model are veryclose to the experiment, suggesting that the material properties arereasonable. At 1500 W/cm2, using a silane functionalized GO layerresults in a 7°C decrease in temperature when compared to thenon-functionalized case. In the FE simulation, an 11.85°C decrease is measuredwhen increasing the thermal conductance of the functionalization layer from 105to 109 W/m2K at 1500 W/cm2. A smaller decreaseof 5.85°C was measured from 106 to 109 Wm2K at1500 W/cm2. The good accuracy of this simulation suggests that itcan be used as a design tool for predicting the cooling performance ofthermally conductive films. These initial findings suggest that when thesimulation is used in conjunction with experimental measurements and lowerscale atomistic simulations, such as molecular dynamics, it will produceaccurate predictions.